The Role
You will be a member of the R&D digital ASIC design team that develops Axonne's core proprietary IP. As a Senior ASIC Design Engineer, you will take ownership of functional blocks and subsystems of our digital ASICs — from specification and RTL through silicon validation.
Responsibilities

• Lead functional blocks and/or subsystems of digital ASICs from design through silicon validation and qualification, including RTL coding and verification.
• Proactively work with team members and partners to align on specifications, drive design reviews, and complete documentation.
• Manage and expand relationships with internal and external development partners.
• Be a key contributor to ASIC roadmaps and future innovation.
• Contribute to co-development activities prototyping ASIC designs on FPGA or in software models, supporting pre-silicon firmware development and verification.
• Drive design methodology and tool automation improvements as needed.

Education and Experience

• BS or MS degree in Electrical Engineering or equivalent, with a focus on VLSI design.
• Minimum 5 years of ASIC or SoC design and development experience.

Knowledge and Skills

• Deep knowledge of embedded system design, verification, and product development lifecycle.
• Very familiar with digital ASIC/SoC design flow from RTL to silicon characterization.
• Very familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc., as well as Verilator for RTL simulation.
• Very familiar with UVM-based verification methodology.
• Very familiar with design and programming languages: SystemVerilog, Python, C, etc.
• Very familiar with software versioning tools like git.
• Excellent analytical and problem-solving skills.
• Excellent written and verbal communication skills, ability to negotiate design features and options.

Deep knowledge and domain know-how in one or more areas below is a big plus.

• ARM microprocessor subsystems.
• AMBA specifications like AXI, AXIS, APB.
• AI knowledge to accelerate ASIC design, verification, and engineering productivity.

What We Offer

• Competitive salary.
• Real end-to-end ownership of your blocks, in a small and experienced team.

Senior digital designer with 5+ years in ASIC/SoC and at least one full chip cycle behind them — spec to silicon bring-up, with real block ownership. Proficient in SystemVerilog, UVM, and Synopsys/Cadence flows, comfortable with Verilator and Python automation; ARM/AMBA experience a strong plus. Autonomous, rigorous, communicates clearly in English, and thrives with end-to-end responsibility in a small team.

Axonne Inc. is an innovative, fabless Silicon Valley semiconductor design company specializing in the development of cutting-edge high-speed networking solutions for the automotive and robotics industries. With a focus on driving digital transformation, Axonne combines advanced research with practical applications to create products that enhance connectivity, data transfer, security, and system integration, facilitating the realization of artificial intelligence (AI), machine learning (ML), and enabling a Software-Defined Network (SDN). Axonne continues to be a trusted partner for organizations seeking to future-proof their value proposition and unlock new possibilities and opportunities for growth and success.